Fractional-N PLL Synthesizer Spur Reduction Technique

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Authors: Skotorenko I. V.

Annotation: Fractional-N PLL synthesizer spur reduction technique is described. The block diagram of the synthesizer with the reduced level of spurs is given as a result and the algorithm of its operation is described.

Keywords: phase-locked loop, fractional-n pll synthesizer, the electronic two-position switch, phase detector, spurs