Abstract: The practical methods of parallel BCH/CRC-encoder design are described. Further the method of design for serial-parallel architectures is proposed. The method is based on the generator matrix of BCH code.
Keywords: encoder, shift register, generator matrix, state space representation
Authors and copyright holders:
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For citation:
Kravchenko A. N. Methods for design of parallel BCH/CRC-encoder. Doklady Tomskogo gosudarstvennogo universiteta sistem upravleniya i radioelektroniki, 2014, no. 4(34), pp. 79–84.
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